In this brief paper, the dependency of short-circuit power on threshold voltage is\r\nanalyzed and utilized for short circuit (SC) power reduction in multi-threshold (MTCMOS)\r\nprocesses. Analytical expressions are developed for estimation of the change of ratio\r\nbetween short-circuit power and dynamic power (PSC/Pdyn) while changing the design\r\nprocess. The analysis shows that the PSC/Pdyn ratio can increase significantly if the VT/Vdd\r\nratio in new process decreases. An analytical expression is also derived for estimation of\r\npotential SC power reduction in MTCMOS processes by replacing low-VT transistors by\r\nhigh-VT devices in the same process. The proposed technique allows significant reduction\r\nof SC power without the need for process shift. The simulation results show good\r\ncorrelation with the analytical estimation at cell level, while demonstrating an average SC\r\npower saving of 36%. The performance impact is also validated, showing that timing\r\ndegradation is minor and controllable. The proposed optimization technique is applicable\r\nto any multi-threshold process. The technique is simple for implementation, and can be\r\neasily integrated in the existing optimization tools.
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